OK, I have new BUCK design with phase margin >45 degree, crossover freq <1/5 of the switching freq, now, what is the rule of thumb for the gain margin?? What is recommended?

Does the rule of thumb for the crossover freq is always <1/5f? Even when the switching freq is 6MHz? Let me know your opinion...

Rule of thumb, 10dB minimum, target 20dB. You want good noise rejection at the switching frequency.

You should only use as much bandwidth as is required by the application. More bandwidth means more noise; sometimes this can cause you to fail "ripple" spec's. In this case it is not ripple, defined as the periodic perturbations of the output due to switching events, but the noise that the feedback line(s) pick up in the application.

Ron, what does it mean: "as much bandwidth as is required by the application"? can you clarify?

A maximum crossover of 1/5 the switching frequency is a reasonable rule, although more aggressive than usual. As switching frequencies go up, you will need some really good amplifiers to stick with this guideline.

As the bandwidth of the loop goes up, the output impedance goes down for the given output capacitor. If you want to minimize the output capacitance, and high bandwidth is essential. For POL buck converters, loops tend to be very aggressive for this reason. For example, the TI Swift converters switching at 1 MHz cross the loop over at 100 kHz. I have verified that loop with measurements, they really do get there.

For other commercial applications, you will often find there is a lot of capacitance on the output anyway to absorb the ripple current, and you don't need to be as aggressive. As Ron says, a higher crossover frequency can cause noise problems and is not always a good thing if you don't need it. The early Vicors switched at 1 MHz but only had a 1 kHz crossover - that's 1/1000 of the switching frequency. It met its spec, so there was not a big push to increase it.

Hi Raanan

The default value for gain margin is 6 db.
The crossover ( 0db) frequency : a more conservative rule is to set the crossover frequency around 1/8 to 1/10 of the switching frequency , to avoid switching harmonics being reflected in the bandwidth range.

This is great information I'm writing into my SMPS design books for me and for those who follow.

Hi Rannan, good to see you here, hope all is well with you!

For me, the purpose of gain margin is so that variations in components and process won't result in the gain changing enough to erode the stability. Instead of a fixed rule of thumb value I like to look at the shape of the magnitude plot around the area where the phase is -180 degrees. If a small change in magnitude could get me in trouble I'll redesign the compensation. If there's less than 10dB gain margin but the gain is monotonically decreasing rapidly then I'm not too worried.

Ron is also correct about not using more bandwidth than necessary for the application, not only could you have noise problems but it can put you out in the area where the amplifiers are starting to run out of steam and process variations will have a bigger effect on your open loop response.



John

To add to John's comment on the gain plot at 180 degree crossing; if I see the slope of the gain going up after the gain crosses zero, even if I have good gain margin at the peak, I'm concerned. It bears investigation.

This is a complex issue as there is a difference between small signal performance as measured by a Bode plot and large signal response as in a 50% load step. Many of the "fast transient response" regulators, like those used in processor applications, do not cross over at very high bandwidths (less than 10% of Fsw) yet have acceptable transient response. The two parameters of transient response and bandwidth are often confused; nor do they stand alone but are interrelated.

Hey John, good to see you here too (its a small world). and thank you all for sharing your thoughts. it helps a lot.

As a dead line,you could choose 1/3 Fsw for crossover freq,but this means you need more carefully on choose ouput LC and PCB Layout.

Hello there, I am a new member and accepted Dr Ridley invitation recently.
But reading the post, I am still wondering who is still believing in a "rule of thumb". Doing industrial stuff, nobody could be satisfied with : "usually I take this margin", "this is recommended", "I am not used to increase this value "...
I mean what is the fundation of this ? I have to say that linear approximations, bode plots, PWM switch models, are the easiest way to study stability of DC/DC converter.
This is mandatory but not enough. Having a sufficient phase margin is not enough.
How can you guarantee you do not enter in subharmonics.
The DC/DC converters are highly non-linear systems due to their changing topology (power stage commutation). Why do we keep studying them as linear systems ?
I would suggest to get rid of this habit and use this post to start a real non linear stability study.
This was for the critics. Now let's be constructive and thinking large transient signal.
I will give some ideas I have to do this.
The first thing to do is to write state space matrix for both topology (Buck case).
Then wirte the transition equation between one state and the other.
Let's see what we can do with this.

I will be interested to see everyone's comments on this proposed approach.

I don't think that a State-space model will end up a better result than the circuit averaging or an averaged switched model will show. Especially if we are talking about a large signal model... In my opinion state-space approach makes you lose your insight about what is really hapening in the circuit. I met something called generalized state-space model but that looked me much more complex, i don't know why. And speaking of the phase or gain margin i always prefer to think on components and their tolerances. Because that is why we need these margins. So the component based measurements and understanding the limits of the component tolerances that we have in hand and in design will help further to decide the level of crossover frequency and gain/phase margin duo.

Here is a little history.

For small-signal, the PWM switch model provides better results than state-space averaging.

In CCM, the results are the same. Except, of course, the PWM switch model is trivial to apply, and state-space averaging is very convoluted.

In DCM, state-space averaging threw away the inductor as a state of the system. The switch model retained the inductor which produced some phase delay for the regular converters and this was confirmed by Vorperian with measurements.

The most important difference was for the Cuk and Sepic converters. State-space averaging was never able to predict anything for these converters. In Cuk's early papers on his converter, you will see there are predictions and measurements for the CCM operation, but only measurements for DCM.

State-space averaging couldn't throw away the inductor because there are two of them, and DCM occurs when their current sum is zero. These converters retained their unpleasant RHP zeros even in DCM, and the switch model clearly showed this.

(Later on, the enhanced state-space averaging filled in this gap, but it was even more complicated than the original.)

Hi, I did not mean going from state space matrix to state space averaging.
If we want to have real stability criteria, please, do not consider averaging.
Let's stay large signal.
Matrix form is just more convenient for circuit analysis.
To solve a problem, the best is to simply write what you see.
For a buck, the first topology is with the coil connected to supply (first matrix).
The second topology is coil connected to ground (second matrix). Let's consider PWM CCM first.
Then write the equation which allows to switch from topology to the other. In case of voltage-mode : Error = ramp. Any idea for the next step ?